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1

[IEEE 15th Annual IEEE International ASIC/SOC Conference - Rochester, NY, USA (25-28 Sept. 2002)] 15th Annual IEEE International ASIC/SOC Conference - An effective soft module floorplanning algorithm based on sequence pair

Jun Cheng Chi,, Mely Chen Chi,

Year:

2002

Language:

english

File:

PDF, 327 KB

english, 2002

2

[IEEE [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit - Rochester, NY, USA (21-25 Sept. 1992)] [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit - Fast turn-around ASIC design environment with design assistant tools

Yuan-Hua Chu,, Charng-Der Jia,, Geeng-Tyng Shaw,, Jun-Ren Chang,, Mely Chen Chi,

Year:

1992

Language:

english

File:

PDF, 323 KB

english, 1992

3

[IEEE 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012 - Seoul, Korea (South) (2012.05.20-2012.05.23)] 2012 IEEE International Symposium on Circuits and Systems - NBTI-aware dual threshold voltage assignment for leakage power reduction

Tu, Wen-Pin, Wu, Shih-Wei, Huang, Shih-Hsu, Chi, Mely Chen

Year:

2012

Language:

english

File:

PDF, 439 KB

english, 2012

4

[IEEE Sixth Annual IEEE International ASIC Conference and Exhibit - Rochester, NY, USA (27 Sept.-1 Oct. 1993)] Sixth Annual IEEE International ASIC Conference and Exhibit - Testable design environment with test-added tools

Yih-June Liou,, Wei-Shiou Wu,, Mely Chen Chi,

Year:

1993

Language:

english

File:

PDF, 266 KB

english, 1993

5

[IEEE IEEE International SOC Conference - Portland, OR, USA (17-20 Sept. 2003)] IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. - A hierarchical partitioning algorithm for VLSI designs

Wen Chen Huang,, Jyh-Herng Wang,, Chien-Ming Huang,, Mely Chen Chi,

Year:

2003

Language:

english

File:

PDF, 152 KB

english, 2003

6

[IEEE Comput. Soc IEEE 2000 1st International Symposium on Quality Electronic Design - San Jose, CA, USA (20-22 March 2000)] Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525) - A reliable clock tree design methodology for ASIC designs

Mely Chen Chi,, Shih-Hsu Huang,

Year:

2000

File:

PDF, 209 KB

2000

7

Gate Level Multiple Supply Voltage Assignment Algorithm for Power Optimization Under Timing Constraint

Chi, Jun Cheng, Lee, Hung Hsie, Tsai, Sung Han, Chi, Mely Chen

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2007

Language:

english

File:

PDF, 1.56 MB

english, 2007

8

[IEEE 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2008.04.23-2008.04.25)] 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Obstacle-Avoiding Rectilinear Steiner Minimal Tree construction

Yung-Tai Chang,, Ya-Wen Tsai,, Jun-Cheng Chi,, Mely Chen Chi,

Year:

2008

Language:

english

File:

PDF, 791 KB

english, 2008

9

[IEEE Eleventh Annual IEEE International ASIC Conference - Rochester, NY, USA (13-16 Sept. 1998)] Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) - A practical interconnect driven ASIC design procedure

Mely Chen Chi,, Tseng, J.M., Lee, C.Y., Huang, S.H.

Year:

1998

Language:

english

File:

PDF, 424 KB

english, 1998

10

[IEEE Eleventh Annual IEEE International ASIC Conference - Rochester, NY, USA (13-16 Sept. 1998)] Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) - Asic Cad Applications And Algorithms

Auletta, R.J., Mely Chen Chi,

Year:

1998

Language:

english

File:

PDF, 49 KB

english, 1998

11

The spin correlation in a ferromagnet with random anisotropy

Chi, Mely Chen, Egami, T.

Journal:

Journal of Applied Physics

Year:

1979

Language:

english

File:

PDF, 445 KB

english, 1979

12

[IEEE 2011 International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2011.03.14-2011.03.16)] 2011 12th International Symposium on Quality Electronic Design - A layer prediction method for minimum cost three dimensional integrated circuits

Hsueh, Tsu-Yun, Yang, Hsiang-Hui, Wu, Wei-Chieh, Chi, Mely Chen

Year:

2011

Language:

english

File:

PDF, 379 KB

english, 2011

13

[IEEE 2010 International Symposium on Computer, Communication, Control and Automation (3CA) - Tainan, Taiwan (2010.05.5-2010.05.7)] 2010 International Symposium on Computer, Communication, Control and Automation (3CA) - A design partitioning algorithm for Three Dimensional Integrated Circuits

Ye, Hua-Sin, Chi, Mely Chen, Huang, Shih-Hsu

Year:

2010

Language:

english

File:

PDF, 153 KB

english, 2010

14

Computer simulation of wall pinning effect and intrinsic coercivity of thin domain walls

Chi, Mely Chen, Gyorgy, E. M., Alben, R.

Journal:

Journal of Applied Physics

Year:

1978

Language:

english

File:

PDF, 508 KB

english, 1978

15

[IEEE Comput. Soc . 17th International Conference on VLSI Design - Mumbai, India (5-9 Jan. 2004)] Proceedings. 17th International Conference on VLSI Design - A compact low-power buffer amplifier with dynamic bias control technique

Chih-Jen Yen,, Wen-Yaw Chung,, Mely Chen Chi,

Year:

2004

Language:

english

File:

PDF, 432 KB

english, 2004

16

[IEEE 2010 11th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2010.03.22-2010.03.24)] 2010 11th International Symposium on Quality Electronic Design (ISQED) - A multilevel multilayer partitioning algorithm for three dimensional integrated circuits

Yu Cheng Hu,, Yin Lin Chung,, Mely Chen Chi,

Year:

2010

Language:

english

File:

PDF, 269 KB

english, 2010

17

[IEEE 2013 3rd Interdisciplinary Engineering Design Education Conference (IEDEC 2013) - Santa Clara, CA (2013.3.4-2013.3.5)] 2013 3rd Interdisciplinary Engineering Design Education Conference - An EDA course module for the topic of reliability using automotive electronics as applications

Shih-Hsu Huang,, Wen-Pin Tu,, Hua-Hsin Yeh,, Mely Chen Chi,

Year:

2013

Language:

english

File:

PDF, 357 KB

english, 2013

18

[IEEE Sixth Annual IEEE International ASIC Conference and Exhibit - Rochester, NY, USA (27 Sept.-1 Oct. 1993)] Sixth Annual IEEE International ASIC Conference and Exhibit - A floorplanning system for tape automated bonding packages

Sung-Ying Tseng,, Lin, D.R.J., Mely Chen Chi,

Year:

1993

Language:

english

File:

PDF, 274 KB

english, 1993

19

AIP Conference Proceedings [American Institute of Physics MAGNETISM AND MAGNETIC MATERIALS — 1976: Proceedings of the First Joint MMM‐Intermag Conference - Pittsburgh, Pennsylvania (USA) (15–18 June 1976)] - Hysteresis Curves for a Dense Random Packing Model of an Amorphous Magnet with Random Uniaxial Anisotropy

Chi, Mely Chen, Alben, Richard

Year:

1976

File:

PDF, 574 KB

1976

20

Hysteresis curves and magnetization processes in a model for an amorphous magnet with random uniaxial anisotropy

Chi, Mely Chen, Alben, Richard

Journal:

Journal of Applied Physics

Year:

1977

Language:

english

File:

PDF, 587 KB

english, 1977

21

[IEEE 2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics - Herndon, VA, USA (25-28 Sept. 2005)] 2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics - An IR drop-driven placer for standard cells in a SOC design

Jun Cheng Chi,, Tsung Hui Huang,, Mely Chen Chi,

Year:

2005

Language:

english

File:

PDF, 2.33 MB

english, 2005

22

[ACM ISLPED International Symposium on Low-Power Electronics and Design - Seoul, South Korea (25-27 Aug. 2003)] Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. - A 0.75-mW analog processor IC for wireless biosignal monitor

Chih-Jen Yen,, Wen-Yaw Chung,, Mely Chen Chi,, Shing-Hao Lee,

Year:

2003

Language:

english

File:

PDF, 484 KB

english, 2003

23

[IEEE Computer Soc 18th International Conference on VLSI Design - Kolkata, India (3-7 Jan. 2005)] 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design - A wide-swing V/sub T/-referenced circuit with insensitivity to device mismatch

Chih-Jen Yen,, Wen-Yaw Chung,, Mely Chen Chi,

Year:

2005

Language:

english

File:

PDF, 673 KB

english, 2005

24

[IEEE 14th Annual IEEE International ASIC/SOC Conference - Arlington, VA, USA (12-15 Sept. 2001)] Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558) - A new two-layer power/ground router for VLSI layout

Jun Cheng Chi,, Mely Chen Chi,

Year:

2001

Language:

english

File:

PDF, 385 KB

english, 2001

25

[IEEE 2012 13th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2012.03.19-2012.03.21)] Thirteenth International Symposium on Quality Electronic Design (ISQED) - A 3D IC designs partitioning algorithm with power consideration

Chang, Ho-Lin, Lai, Hsiang-Cheng, Hsueh, Tsu-Yun, Cheng, Wei-Kai, Chi, Mely Chen

Year:

2012

Language:

english

File:

PDF, 459 KB

english, 2012

26

[IEEE IEEE International SOC Conference, 2004. Proceedings. - Santa Clara, CA, USA (Sept. 12-15, 2004)] IEEE International SOC Conference, 2004. Proceedings. - Low-power driven standard-cell placement based on a multilevel force-directed algorithm

Yu-Hsiung Huang,, Mely Chen Chi,

Year:

2004

Language:

english

File:

PDF, 151 KB

english, 2004

27

[IEEE 2003 International Symposium on VLSI Technology, Systems and Applications. Technical Papers - Hsinchu, Taiwan (6-8 Oct. 2003)] 2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672) - A new timing-driven standard cell placement algorithm

Jun Cheng Chi,, Jei Ming Feng,, Mely Chen Chi,

Year:

2003

Language:

english

File:

PDF, 316 KB

english, 2003

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